library ieee;
use ieee.std_logic_1164.all;

entity tProSiPt is
port(
		VGA_BLANK_N :  OUT  STD_LOGIC;
		VGA_SYNC_N :  OUT  STD_LOGIC;
		VGA_VS :  OUT  STD_LOGIC;
		VGA_HS :  OUT  STD_LOGIC;
		VGA_CLK :  OUT  STD_LOGIC;
		LED_G01 :  OUT  STD_LOGIC;
		LED_G02 :  OUT  STD_LOGIC;
		LED_G03 :  OUT  STD_LOGIC;
		LED_G04 :  OUT  STD_LOGIC;
		LED_G05 :  OUT  STD_LOGIC;
		LED_G06 :  OUT  STD_LOGIC;
		LED_G07 :  OUT  STD_LOGIC;
		LED_G00 :  OUT  STD_LOGIC;
		LED_G08 :  OUT  STD_LOGIC;
		LED_R00 :  OUT  STD_LOGIC;
		LED_R01 :  OUT  STD_LOGIC;
		LED_R02 :  OUT  STD_LOGIC;
		LED_R03 :  OUT  STD_LOGIC;
		LED_R04 :  OUT  STD_LOGIC;
		LED_R05 :  OUT  STD_LOGIC;
		LED_R06 :  OUT  STD_LOGIC;
		LED_R07 :  OUT  STD_LOGIC;
		LED_R08 :  OUT  STD_LOGIC;
		LED_R09 :  OUT  STD_LOGIC;
		LED_R10 :  OUT  STD_LOGIC;
		LED_R11 :  OUT  STD_LOGIC;
		LED_R12 :  OUT  STD_LOGIC;
		LED_R13 :  OUT  STD_LOGIC;
		LED_R14 :  OUT  STD_LOGIC;
		LED_R15 :  OUT  STD_LOGIC;
		LED_R16 :  OUT  STD_LOGIC;
		LED_R17 :  OUT  STD_LOGIC;
		VGA_B :  OUT  STD_LOGIC_VECTOR(7 DOWNTO 0);
		VGA_G :  OUT  STD_LOGIC_VECTOR(7 DOWNTO 0);
		VGA_R :  OUT  STD_LOGIC_VECTOR(7 DOWNTO 0)
);
end;

architecture ArchProSiPt of tProSiPt is

COMPONENT ProSiPt
PORT (
		Clk50MHz :  IN  STD_LOGIC;
		SW00 :  IN  STD_LOGIC;
		SW17 :  IN  STD_LOGIC;
		SW15 :  IN  STD_LOGIC;
		SW14 :  IN  STD_LOGIC;
		SW13 :  IN  STD_LOGIC;
		SW12 :  IN  STD_LOGIC;
		SW11 :  IN  STD_LOGIC;
		SW10 :  IN  STD_LOGIC;
		SW09 :  IN  STD_LOGIC;
		SW08 :  IN  STD_LOGIC;
		SW07 :  IN  STD_LOGIC;
		SW06 :  IN  STD_LOGIC;
		SW05 :  IN  STD_LOGIC;
		SW04 :  IN  STD_LOGIC;
		SW03 :  IN  STD_LOGIC;
		SW02 :  IN  STD_LOGIC;
		SW01 :  IN  STD_LOGIC;
		SW16 :  IN  STD_LOGIC;
		VGA_BLANK_N :  OUT  STD_LOGIC;
		VGA_SYNC_N :  OUT  STD_LOGIC;
		VGA_VS :  OUT  STD_LOGIC;
		VGA_HS :  OUT  STD_LOGIC;
		VGA_CLK :  OUT  STD_LOGIC;
		LED_G01 :  OUT  STD_LOGIC;
		LED_G02 :  OUT  STD_LOGIC;
		LED_G03 :  OUT  STD_LOGIC;
		LED_G04 :  OUT  STD_LOGIC;
		LED_G05 :  OUT  STD_LOGIC;
		LED_G06 :  OUT  STD_LOGIC;
		LED_G07 :  OUT  STD_LOGIC;
		LED_G00 :  OUT  STD_LOGIC;
		LED_G08 :  OUT  STD_LOGIC;
		LED_R00 :  OUT  STD_LOGIC;
		LED_R01 :  OUT  STD_LOGIC;
		LED_R02 :  OUT  STD_LOGIC;
		LED_R03 :  OUT  STD_LOGIC;
		LED_R04 :  OUT  STD_LOGIC;
		LED_R05 :  OUT  STD_LOGIC;
		LED_R06 :  OUT  STD_LOGIC;
		LED_R07 :  OUT  STD_LOGIC;
		LED_R08 :  OUT  STD_LOGIC;
		LED_R09 :  OUT  STD_LOGIC;
		LED_R10 :  OUT  STD_LOGIC;
		LED_R11 :  OUT  STD_LOGIC;
		LED_R12 :  OUT  STD_LOGIC;
		LED_R13 :  OUT  STD_LOGIC;
		LED_R14 :  OUT  STD_LOGIC;
		LED_R15 :  OUT  STD_LOGIC;
		LED_R16 :  OUT  STD_LOGIC;
		LED_R17 :  OUT  STD_LOGIC;
		VGA_B :  OUT  STD_LOGIC_VECTOR(7 DOWNTO 0);
		VGA_G :  OUT  STD_LOGIC_VECTOR(7 DOWNTO 0);
		VGA_R :  OUT  STD_LOGIC_VECTOR(7 DOWNTO 0)
);
END COMPONENT ProSiPt;

SIGNAL Clk50MHz : std_logic := '0';
SIGNAL SW00     : std_logic := '0';
SIGNAL SW01     : std_logic := '0';
SIGNAL SW02     : std_logic := '0';
SIGNAL SW03     : std_logic := '0';
SIGNAL SW04     : std_logic := '0';
SIGNAL SW05     : std_logic := '0';
SIGNAL SW06     : std_logic := '0';
SIGNAL SW07     : std_logic := '0';
SIGNAL SW08     : std_logic := '0';
SIGNAL SW09     : std_logic := '0';
SIGNAL SW10     : std_logic := '0';
SIGNAL SW11     : std_logic := '0';
SIGNAL SW12     : std_logic := '0';
SIGNAL SW13     : std_logic := '0';
SIGNAL SW14     : std_logic := '0';
SIGNAL SW15     : std_logic := '0';
SIGNAL SW16     : std_logic := '0';
SIGNAL SW17     : std_logic := '0';

begin

dut : ProSiPt 
   PORT MAP (
   Clk50MHz => Clk50MHz,
   SW00 => SW00,
	SW01 => SW00,
	SW02 => SW00,
	SW03 => SW00,
	SW04 => SW00,
	SW05 => SW00,
	SW06 => SW00,
	SW07 => SW00,
	SW08 => SW00,
	SW09 => SW00,
	SW10 => SW00,
	SW11 => SW00,
	SW12 => SW00,
	SW13 => SW00,
	SW14 => SW00,
	SW15 => SW00,
	SW16 => SW00,
	SW17 => SW00,
	VGA_BLANK_N => VGA_BLANK_N,
	VGA_SYNC_N => VGA_SYNC_N,
	VGA_VS => VGA_VS,
	VGA_HS => VGA_HS,
	VGA_CLK => VGA_CLK,
	LED_G01 => LED_G01,
	LED_G02 => LED_G02,
	LED_G03 => LED_G03,
	LED_G04 => LED_G04,
	LED_G05 => LED_G05,
	LED_G06 => LED_G06,
	LED_G07 => LED_G07,
	LED_G00 => LED_G00,
	LED_G08 => LED_G08,
	LED_R00 => LED_R00,
	LED_R01 => LED_R01,
	LED_R02 => LED_R02,
	LED_R03 => LED_R03,
	LED_R04 => LED_R04,
	LED_R05 => LED_R05,
	LED_R06 => LED_R06,
	LED_R07 => LED_R07,
	LED_R08 => LED_R08,
	LED_R09 => LED_R09,
	LED_R10 => LED_R10,
	LED_R11 => LED_R11,
	LED_R12 => LED_R12,
	LED_R13 => LED_R13,
	LED_R14 => LED_R14,
	LED_R15 => LED_R15,
	LED_R16 => LED_R16,
	LED_R17 => LED_R17,
	VGA_B => VGA_B,
	VGA_G => VGA_G,
	VGA_R => VGA_R
  );

clock : PROCESS
   begin
   wait for 10 ns; Clk50MHz  <= not Clk50MHz;
end PROCESS clock;

SW : PROCESS
   begin
   wait for 5 us;
          	SW00  <= '1';
          	SW01  <= '1';
          	SW02  <= '1';
          	SW03  <= '1';
				SW04  <= '1';
          	SW05  <= '1';
          	SW06  <= '1';
          	SW07  <= '1';
          	SW08  <= '1';
				SW09  <= '1';
          	SW10  <= '1';
          	SW11  <= '1';
          	SW12  <= '1';
          	SW13  <= '1';
				SW14  <= '1';
          	SW15  <= '1';
          	SW16  <= '1';
          	SW17  <= '1';
	wait;
end PROCESS SW;

end ArchProSiPt;

